Finding the Best Way To Produce Microchips

Roxann Englestad

Through powerful computer models that actually simulate the making of computer chips, UW–Madison engineers are helping lead manufacturers to a new generation of smaller, faster and better electronics.

Roxann Engelstad, a mechanical engineering professor, is directing a $2 million project funded by Sematech to simulate four competing technologies for making semiconducters in the next century. Sematech, a 10-member consortium of semiconducter manufacturers, will use results of the project to generate data for the industry.

Semiconducters are the heart of nearly every modern electronics system, from microwave ovens to supercomputers. Decreasing the size of semiconducters helps computers deliver more power, store more memory and perform more tasks.

The technology that served industry for decades will finally hit a wall in a few years, forcing the industry to literally reinvent the way it builds chips, Engelstad says. Optical lithography, the current approach in making semiconducters, does not appear to have the capability to print future circuitry in the precise dimensions needed.

Four new approaches to lithography are being considered, including the use of X-ray, electron beam, projection ion beam and extreme ultraviolet. Finding which competing technology is most cost-effective, Engelstad says, is being hailed by some in the industry as the “decision of the century.”

“None of these technologies are in commercial use yet,” Engelstad says. “Trial-and-error and pilot projects are not really an option because of the tremendous expense involved.”

Franco Cerrina, director of the Center for X-Ray Lithography and co-investigator, estimates that launching any single new technology in chip manufacturing would cost at least $1 billion in research and development.

Engelstad has 13 graduate students, four research assistants and three faculty associates working at a frenetic pace to meet the industry deadline. Sematech would like to have results of all computer models by November, when it will meet on the issue with lithography experts from around the world.

Rather than advocating any single technology, Engelstad says the research will provide baseline information to help industry make an informed decision.

The key issues in the simulations, she says, are determining the accuracy and stability of the “masks,” or original molds that provide the template for manufacturing thousands of microchips. Usually made of silicon or a silicon composite, the precision of the original masks is the most critical part of computer manufacturing.

Cerrina says the computer models can simulate how much image displacement might occur in making the masks. “You can liken image displacement to the three-color printing process,” he explained. “Each layer of color needs to be lined up perfectly to get a clear picture. But in the case of making masks, there are more than 20 layers of color, rather than three.”

The simulations are amazingly precise. Starting with an image of a silicon wafer on her computer screen, Engelstad honed in on a tiny fraction of the wafer, revealing intricate silicon structures only a few dozen microns wide.

Engelstad says current technology can produce details down to .25 microns, but the goal is .10 microns and below. That would allow chip-makers to put 16 times more transistors on a single chip. As a sense of scale, a human hair is roughly 75 microns thick.

Cerrina says the UW–Madison project is one of 10 funded by Sematech on different aspects of data gathering. It’s a major undertaking fueled by necessity, he says.

“Fabricating next-generation transistors with today’s process would be like producing a finely detailed painting with a house-paint brush,” Cerrina says. “We need a finer brush for the job.”